1. Field of the Invention
The invention relates to a method of fabricating a semiconductor device, and more particularly to such a method including the step of chemical mechanical polishing (CMP).
2. Description of the Related Art
There have been suggested methods of fabricating a semiconductor device, including a step of carrying out chemical mechanical polishing. For instance, Japanese Unexamined Patent Publication No. 5-275366 has suggested such a method. Hereinbelow is explained the method suggested in the Publication, with reference to FIGS. 1A to 1C.
First, there is fabricated such a wafer as illustrated in FIG. 1A. The illustrated wafer is comprised of a semiconductor substrate 1, an insulating film 2 formed over the semiconductor substrate 1 and composed of boron phospho silicate glass (BPSG), a wiring layer 4 formed on the insulating film 2, an oxide film 3 made by plasma and formed covering the wiring layer 4 and the insulating film 2 therewith, the oxide film 3 being formed with a contact hole reaching the wiring layer 4, a barrier metal film 5 formed on the oxide film 3 and covering an inner wall of the contact hole and an exposed surface of the wiring layer 4 therewith, and a tungsten film 6 deposited over the barrier metal film 5 and having a thickness of 1000 nm.
The tungsten film 6 is formed by chemical vapor deposition (CVD) for sufficiently filling the contact hole therewith. However, the tungsten film 6 may be formed by other methods.
Then, the tungsten film 6 is removed by CMP.
The wafer is placed on a polishing pad mounted on a rotary platen, and is polished by CMP through the use of slurry containing polishing particles such as Al.sub.2 O.sub.3 and acid or base such as H.sub.2 O.sub.2, KOH and NH.sub.4 OH. For instance, CMP is detailed in U.S. Pat. No. 4,992,135.
By polishing the tungsten film 6 by CMP, there is formed a tungsten plug 11 in the contact hole. However, the tungsten plug 11 is recessed at a surface thereof relative to a surface of the oxide film 3, as illustrated in FIG. 1B.
In order to eliminate a recess of the tungsten plug 11, the oxide film 3 is polished by CMP. In CMP, there is employed colloidal silica slurry containing H.sub.2 O.sub.2 and KOH both of which selectively make reaction with the oxide film 3.
As illustrated in FIG. 1C, CMP is continued until the tungsten plug 11 projects over a surface of the oxide film 3. Thus, there is obtained a projected tungsten plug 12. The projected tungsten plug 12 provides enhanced electrical connection with a wiring layer to be formed above the tungsten plug 12.
However, the conventional method having been explained with reference to FIGS. 1A to 1C needed to carry out CMP twice. As a result, since it was necessary to prepare polishing materials such as polishing agent and polishing pad for carrying out the second CMP, the conventional method takes much time for polishing and needs much cost.
In addition, in the conventional method, since the second CMP is accomplished at a high polishing rate through the use of polishing agent which selectively makes reaction with the oxide film 3, a metal plug projects relative to a surface of the oxide film 3 as illustrated in FIG. 1C, which exerts harmful influence on planarization in subsequent steps.
Japanese Unexamined Patent Publication No. 10-98040 has suggested a method of fabricating a semiconductor device including the steps of polishing an interlayer insulating film formed on a substrate, by CMP, and introducing phosphorus into the interlayer insulating film prior to carrying out CMP or subsequently to carrying out CMP.
Japanese Unexamined Patent Publication No. 9-153472 has suggested method of washing a surface of a semiconductor substrate having been lanarized, including the step of radiating ultra-violet rays to a surface of the emiconductor substrate in water to thereby remove an organic compound layer having been formed on metal of which a buried wiring layer is composed.
Japanese Unexamined Patent Publication No. 10-56014 has suggested a method of polishing a substrate, including the steps of polishing a target formed on a substrate, by CMP, and applying plasma to a polished surface of the target.
Japanese Unexamined Patent Publication No. 9-162288 has suggested a method of forming a wiring layer, including the steps of forming a recess or a hole with an insulating film formed on a substrate, forming a first electrical conductor on an inner wall of the recess or hole so that a top edge thereof is located lower than a top edge of the insulating film, depositing an electrically conductive material which is different from the first electrical conductor, over the insulating film and the recess or hole, removing the first electrical conductor except the first electrical conductor located in the recess or hole, by polishing to be carried out through the use of polishing particles, and removing the polishing particles through the use of chemical.
Japanese Unexamined Patent Publication No. 6-302581 has suggested a method of etching an insulating film, including the steps of heating hydrofluoric acid solution to thereby generate hydrofluoric acid vapor, and supplying the hydrofluoric acid vapor to a cooled target to thereby etching a silicon dioxide film formed on the target.
The above-mentioned problem remains unsolved even by the method having been suggested in the above-mentioned Publications.